Intergrated circuit tester



FIG. 1 is a top, front and right side perspective view of a intergrated circuit tester showing our new design;

FIG. 2 is a top, front and right side perspective view, with the circuitry enclosure rotated 180 degrees;

FIG. 3 is a top plan view;

FIG. 4 is a right side elevational view;

FIG. 5 is a front elevational view;

FIG. 6 is a rear elevational view;

FIG. 7 is a top, front and right side perspective view of a second embodiment of our new design of FIGS. 1-6;

FIG. 8 is a top, front and right side perspective view, with the circuitry enclosure rotated 180 degrees;

FIG. 9 is a top plan view;

FIG. 10 is a right side elevational view, the left side elevational view being a mirror image;

FIG. 11 is a front elevational view;

FIG. 12 is a rear elevational view;

FIG. 13 is a top, front and right side perspective view of a third embodiment of our new design of FIGS. 1-6;

FIG. 14 is a top, front and right side perspective view, with the circuitry enclosure rotated 180 degrees;

FIG. 15 is a top plan view;

FIG. 16 is a right side elevational view, the left side elevational view being a mirror image;

FIG. 17 is a front elevational view; and

FIG. 18 is a rear elevational view thereof. 

The ornamental design for a intergrated circuit tester, as shown and described. 